Epi-ready CMP-polished silicon wafers & thermal oxide (SiO2/Si) substrates (Si / SiO2-on-Si, CAS 7440-21-3) wafers and diced research squares with sub-nanometer surface roughness for PVD, PLD, MBE, and ALD.
Precision-grown and chemical-mechanical-polished (CMP) in a Class 100 cleanroom, our silicon wafers & thermal oxide (SiO2/Si) substrates (Si / SiO2-on-Si, CAS 7440-21-3) substrates provide atomically smooth, epi-ready surfaces (Ra < 0.2–0.5 nm) for thin-film epitaxy, pulsed laser deposition (PLD), magnetron sputtering, molecular beam epitaxy (MBE), and optical characterization.
Available as bare prime/research wafers, pre-diced 10×10 mm PVD witness chips, or dry/wet thermal oxide (285 nm / 300 nm SiO2 for graphene/2D optical contrast and FET back-gates) and LPCVD Si3N4 coated wafers. Standard research sizes include 5×5 mm, 10×10 mm, and 15×15 mm diced squares (0.5 mm or 1.0 mm thick) as well as Ø 1-inch, 2-inch, 3-inch, and 4-inch wafers in single-side (SSP) or double-side (DSP) polished finishes, packed in individual waffle trays or nitrogen-sealed cassettes with batch orientation and surface inspection data.
| Property / Metric | Nominal Reference Value (Grade Dependent) |
|---|---|
| Formula & CAS # | Si / SiO2-on-Si (CAS 7440-21-3) |
| Crystal System / Grade | Cubic Diamond (Fd-3m) · Prime / Test CZ & FZ Grade (1–100 Ω·cm, Intrinsic >5,000 Ω·cm, or Degenerate 0.001–0.005 Ω·cm) |
| Density | 2.33 g/cm³ |
| Standard Orientations | <100>, <111>, <110> (P-Boron, N-Phosphorus/Arsenic, or Undoped FZ) |
| Surface Finish (CMP) | Ra < 0.2 nm Epi-Ready SSP/DSP; Dry/Wet Thermal SiO2 (90 nm, 285 nm, 300 nm, 500 nm, 1 µm) |
Reference values reflect typical sintered, fused, or wrought grades. Exact batch test figures are confirmed on your written quotation and accompanying lot Certificate of Analysis.
Specify Si / SiO2-on-Si crystallographic orientation (<100>, <111>, <110> (P-Boron, N-Phosphorus/Arsenic, or Undoped FZ)), dimensions and thickness (e.g., 10×10×0.5 mm or Ø 2" × 0.5 mm), SSP vs. DSP polish, edge orientation, and pack count.
Include target quantity, destination country/postal code for express air freight calculation, and any special cleanroom bagging or certification requests.
Prepare Silicon Wafers & Thermal Oxide (SiO2/Si) Substrates RFQ ↗Complementary furnaceware, substrates, PVD consumables, and refractory hardware frequently ordered together.
TB-SAP-SBEpi-ready single-crystal sapphire substrates (C-, R-, A-, M-plane) and Mohs-9 optical sapphire pressure/IR windows from 180 nm UV to 5.0 µm mid-IR.
TB-PVD-SIVacuum-melted high-purity silicon (Si, CAS 7440-21-3) planar magnetron sputtering targets in 5N (99.999%) / 6N Intrinsic, B-doped (p-type), or P-doped (n-type) grades for semiconductor, optical, and research PVD.
TB-PVD-SIO2High-density hot-pressed silicon dioxide (fused quartz) (SiO2, CAS 60676-86-0) ceramic sputtering targets in 4N5 (99.995%) / 5N (99.999%) purity, indium-bonded for arc-free RF and pulsed-DC thin-film deposition.
TB-SUB-SICEpi-ready CMP-polished Single-Crystal 4H-SiC & 6H-SiC wafers & substrates (SiC (4H / 6H), CAS 409-21-2) wafers and diced research squares with sub-nanometer surface roughness for PVD, PLD, MBE, and ALD.
Submit your purity grade, geometry, quantity, and documentation requirements. Every order includes the producing mill's batch Certificate of Analysis (COA) and pre-shipment dimensional verification.